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Vaishnaw sets a target of 24 months to develop indigenous analog IPs

Union Minister for Electronics and Information Technology Ashwini Vaishnaw said that India's semiconductor design program has reached a significant level of achievement, enabling the nation to take off in the global chip industry.

ANI Jan 27, 2026 13:08 IST googleads

Ashwini Vaishnaw, Minister for Electronics & Information Technology (Photo/ANI)

New Delhi [India], January 27 (ANI): Union Minister for Electronics and Information Technology Ashwini Vaishnaw said that India's semiconductor design program has reached a significant level of achievement, enabling the nation to take off in the global chip industry.
During an interaction with 23 semiconductor chip design companies approved under the Design Linked Incentive (DLI) Scheme of the Semicon India Programme, Vaishnaw stated that the journey started three years ago has positioned the country to move beyond theoretical presentations to developed, working projects.
The Minister emphasised that the provision of free, sovereign access to Electronic Design Automation (EDA) tools under C-DAC gave participants a major lead in the design world. "When we started this program, a major concern was access to EDA tools and access to IP," Vaishnaw noted.
He highlighted that funding for startups becomes more accessible once a project is operational, adding, "Funding becomes much easier once you have developed a working project; otherwise, it's just a PPT presentation."
During the discussion, industry participants raised the challenge of indigenously developing standard Intellectual Properties (IPs), such as USB and PCIe, which require high-speed analog designs. Responding to a query regarding the timeline for such development, Vaishnaw set a target of 24 months for the creation of simpler IPs. "Let's take a target of 24 months then," the Minister said.
The conversation further delved into the complexities of analog IPs, which are critical for real-world applications and strategic sectors. Industry representatives pointed out that proving these IPs across multiple technology nodes, such as those from TSMC or UMC, is a time-consuming process. In response, Vaishnaw said, "This is a journey that we started three to four years ago, January 22. Within four years, we are at a very significantly good level of achievement. And this is a level where we can now take off."
"Suppose we make a request to all of you, and we support it fully. Maybe in a period of 36 months we can have a suite of analog IPs coming out of our country. It is definitely possible," Vaishnaw said.
He noted that the skill set exists within the country and among the Indian diaspora holding senior positions in global semiconductor firms. The Minister suggested that standard IPs developed through this collaborative effort could eventually be housed in a DLI repository and mandated for use in chips utilised within India. (ANI)

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